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Reconfigurable Computing

Publications | Publications by Research Area | Reconfigurable Computing

2008

[DCNL-RC-2008-401]
M. T. Frederick and A. K. Somani, "Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs," in Proc. of FPGA-2008, Feb 2008.

2007

[DCNL-RC-2007-701]
S. Ganesh, M. T. Frederick, T. S. B. Sudarshan, and A. K. Somani, "HashChip: A Shared-Resource Multi-Hash Function Processor Architecture on FPGA,'' in the Integration, Elsevier VLSI Journal, Vol. 40, Issue 1, Jan. 2007, pp. 11-19.

2006

[DCNL-RC-2006-406]
Michael T. Frederick and Arun K. Somani, "Multi-Bit Carry Chains for High-Performance Reconfigurable Fabrics," in Proc. of the 16th International Conference on Field Programmable Logic and Applications, August 2006, pp. 275-280.

2005

[DCNL-ON-2004-705]
M. T. Frederick, Nathan A. VanderHorn, and A. K. Somani. "Real-time Hardware Implementation of the Approximate Discrete Radon Transform." To appear in the 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP). July 23-25, 2005.

2004
[DCNL-ON-2004-705]
R. Sangireddy, H. Kim and A. K. Somani, "Low Power High Performance Reconfigurable Computing Cache Architectures," IEEE/ACM Transactions on Computers, Vol.53, No.10, Oct.  2004.
This paper is based on earlier work presented as "Low-Power High-Performance Adaptive Computing Architectures for Multimedia Processing," in Proceedings of HiPC2002, The Ninth Annual International Conference on High Performance Computing, December 2002, pp. 124-134.
2003

[DCNL-RC-2003-415]
R.Sangireddy, H. Kim, and A. K. Somani, "Timing Issues of Operating Mode Switch in High Performance Reconfigurable Architectures,'' in Proceedings of HiPC2003, The Tenth Annual International Conference on High Performance Computing, December 2003.
[DCNL-RC-2003-409]
R. Sangireddy and A. K. Somani, "Application-Specific Computing with Adaptive Register File Architectures," in Proceedings of ASAP2003, The IEEE 14th International Conference on Application-specific Systems, Architectures and Processors, pp. 183-193, June 2003. 
2001

[DCNL-RC-2001-706] 
H. Kim, A. K. Somani, and A. Tyagi, "A Reconfigurable Multi-function Computing Cache Architecture," In IEEE Transactions on Very Large Scale Integration Systems, Volume 9,Issue 4, August 2001, pp. 509-523.                                                                                                                                                  This paper is based on earlier work presented as "A Reconfigurable Multi-function Computing Cache Architecture," in the Proceedings of FPGA 2000, February 2000, pp. 85-94.

1999
[DCNL-RC-1999-406]
Hue-Sung Kim, A. K. Somani, and A. Tyagi, "On Reconfiguring Cache for Computing," in the Proceedings of FCCM '99, April 1999.

[DCNL-RC-1999-405]
D. Deshpande, A. K. Somani, and A. Tyagi, "Hybrid Data/Configuration Caching for Striped FPGA," in the Proceedings of FCCM '99, April 1999.

[DCNL-RC-1999-402]
D. Deshpande, A. K. Somani, and A. Tyagi, "Configuration Scheduling Schemes for Striped FPGA," in the Proceedings of FPGA 99, pp. 206-214, February 1999.

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